The invention lies in the field of semiconductor technology and relates to a method for fabricating a semiconductor component having at least one capacitor. The capacitor has a metal oxide layer between a first and a second electrode. A remanent electrical polarization can be generated in the metal oxide layer by supplying a given voltage difference between the first and second electrodes.
Among other memory devices, so-called nonvolatile memories are proposed for future generations of semiconductor memories. In these nonvolatile memories, the individual memory cells each include a capacitor having a ferroelectric layer as the capacitor dielectric. In this layer, a remanent polarization of the ferroelectric material can be brought about by applying an electric field. It is thus possible to store information in the capacitor depending on the direction of the polarization. Since, unlike in the so-called DRAMs, the information is not stored by accumulated charges, there is also no risk of self-discharge of the capacitor and thus there is no risk of the information disappearing. The polarization produced in the ferroelectric is preserved, in principle, for an infinite time period, which is why such memories are also called nonvolatile memories.
A semiconductor component of the type mentioned above and which contains nonvolatile memory elements is described in U.S. Pat. No. 5,615,144, for example. The memory cells disclosed therein each include a ferroelectric capacitor, one of whose two electrodes is connected to a bit line via a selection transistor. The other electrode is connected to a so-called plate line on which a pulse signal is present. With the selection transistor open, one electrode of the capacitor is brought to the potential of the bit line that is now connected to it. Depending on the signals on the bit line and plate line, the electric field acting on the capacitor dielectric is altered and the orientation and level of the remanent polarization are thus affected.
With the selection transistor closed, one electrode of the capacitor is disconnected from the bit line. It has been shown, however, that this capacitor electrode is electrostatically charged relative to the other electrode as a result, for example, of leakage currents from adjacent cells or of the closed selection transistor, and can thus contribute to an undesired erasure of the polarization or polarization reversal of the capacitor dielectric. This however leads to an irreversible loss of data which must be avoided.
It is accordingly an object of the invention to provide a method for fabricating a semiconductor component which overcomes the above-mentioned disadvantages of the heretofore-known components of this general type and in which undesired alterations or changes of the stored information are avoided.
With the foregoing and other objects in view there is provided, in accordance with the invention, a semiconductor component, including a capacitor having a first electrode, a second electrode, and a metal oxide layer disposed between the first electrode and the second electrode, the metal oxide layer having a first resistance and being remanently electrically polarizable by a given voltage difference between the first electrode and the second electrode; and a resistance element disposed at the capacitor and electrically connecting the first electrode to the second electrode, the resistance element having a second resistance smaller than the first resistance.
In the case of a semiconductor component of the type mentioned above, the first-mentioned object is achieved according to the invention by providing at least one resistance element at the capacitor. The resistance element electrically connects the first electrode to the second electrode and has a predetermined resistance or resistance value, which is lower than the resistance of the metal oxide layer.
The basic concept of the invention is to connect a defined short-circuiting element parallel with the capacitor so that accumulated charges can flow away via this element and, consequently, a potential equalization is brought about between the two capacitor electrodes. The predetermined resistance of the resistance element or of the short-circuiting element should in this case be dimensioned such that, on the one hand, the desired bringing about of the polarization in the event of the addressing of the capacitor is impeded only to an insignificant extent and, on the other hand, a sufficient potential equalization can be effected in the event of a non-addressing. The level of the resistance of the resistance element must therefore be determined by an overall consideration of the electrical circuit that is realized. An essential aspect in this case is that in the event of the remanent polarization being written in, the required voltage is dropped virtually completely across the capacitor and the resistance element, which is connected in parallel with the capacitor. In other words, the total resistance formed from these two elements is still considerably higher than the sum of all the line resistances and of the transistor resistance (with the transistor open). Thus, the resistance element must be dimensioned in such a way that the voltage pulse for bringing about the remanent polarization, as seen over its entire time duration, leads to an electric field which acts effectively on the capacitor dielectric and suffices to bring about a remanent (residual, permanent) electrical polarization in the capacitor dielectric.
On the other hand, the resistance of the resistance element should be low enough to enable the potential equalization of the two electrodes of the capacitor in the event of an unintentional charging of the first and second electrodes relative to one another. Since electrostatic charging of the electrodes, in contrast to the time duration of the preselected voltage difference for bringing about the remanent electrical polarization, takes place essentially significantly more slowly, the magnitude of the resistance of the resistance element can be calculated relatively easily with regard to the required conditions. Thus, this resistance should be lower than the resistance of the metal oxide layer and enable the capacitor to be discharged with a time constant which is at least ten times longer than the time duration for bringing about the remanent polarization. An expedient magnitude of the resistance of the resistance element lies approximately between 1 Mxcexa9 and 100 Gxcexa9, a magnitude between 10 Mxcexa9 and 100 Mxcexa9 being preferred.
In the case of a plurality of memory cells, for example in the case of ferroelectric RAMs, each memory cell preferably has its own resistance element. This assignment is also expedient in the case of memory cells in which the second electrodes are formed by a common metal layer.
In a preferred embodiment, the resistance element is fabricated from polysilicon or from a conductive nitride or silicide, for example a metal silicide. In this case, the resistance of the resistance element, that is to say its effective overall or total resistance, can be set by a suitable doping and/or suitable geometrical dimensioning (effective cross sectional area).
The resistance element is preferably configured as a self-aligned lateral edge web or edge layer on at least one side area or side face of the metal oxide layer. In a further preferred embodiment, the resistance element is formed by a contact hole filled with conductive material in the metal oxide layer. A further possibility for forming a resistance element is to form the resistance element from a layer made of conductive material which covers the entire top side of the first electrode. At least on a side area or side face of the first electrode, this layer covers the second electrode which is applied at the side area with the metal oxide layer being interposed.
In the aforementioned preferred exemplary embodiments, the resistance element is fabricated by applying and patterning or structuring an additional layer. In contrast to this, in a further preferred embodiment, the resistance element can also be formed by at least one region of the metal oxide layer, the region having an altered resistance. In this case, care must be taken to ensure that the metal oxide layer is altered only locally, in order to preclude degeneration of the desired electrical properties of the metal oxide layer (level of the remanent polarization). A region of the metal oxide layer altered in such a way can be brought about for example by indiffusion of at least one diffusion substance. In this case, this diffusion substance may be a metal already contained in the metal oxide layer. In this case, the stoichiometric ratios in the metal oxide layer are altered locally and, as a result, the conductivity of the metal oxide layer is increased in these regions.
The choice of which diffusion substances are to be used depends inter alia on the metal oxide layer used. The metal oxide layers used are preferably ferroelectric metal oxides such as, for example, strontium bismuth tantalate (SrBi2Ta2O9, SBT), niobium-doped strontium bismuth tantalate (SrBi2Ta2-xNbxO9, SBTN), lead zirconium titanate (PbTiO3, PZT) or derivatives thereof. If the diffusion substance is intended to be a metal already contained in the metal oxide layer, it is thus selected from the group bismuth, strontium, niobium, lead, zirconium, titanium, and tantalum. If, on the other hand, an impurity substance or foreign substance is preferred as the diffusion substance, then it is possible to use for example ruthenium, iron or tantalum or titanium.
It is furthermore advantageous to produce the resistance elements in a self-aligned manner directly at the capacitor, as a result of which the space requirement of the memory cell is increased only insignificantly or not at all. At the same time, the integration of the resistance element entails only a minimal additional process complexity and processes that are technologically well controlled are used.
It is also advantageous to produce that region of the metal oxide layer which has an altered resistance by ion implantation. To that end, ions are implanted essentially in a locally delimited region of the metal oxide layer and subsequently activated through the use of a suitable heat treatment. This advantageously allows the relatively simple formation of the resistance element in the metal oxide layer.
In accordance with another feature of the invention, at least one metal selected from bismuth, strontium, niobium, lead, tantalum, titanium, ruthenium, iron, or zirconium is used for the ion implantation.
The second above-mentioned object is achieved through the use of a method for fabricating a semiconductor component having at least one capacitor, in which a metal oxide layer is disposed between a first and a second electrode and in which a resistance element is provided. The method includes the following steps:
applying an electrode material and a metal oxide-containing layer to a substrate surface;
selectively etching the electrode material and the metal oxide-containing layer thus forming the first electrode with the metal oxide layer disposed above it;
conformally applying a conductive material having a predetermined material thickness;
anisotropically etching the conductive material to produce a resistance element in the form of a self-aligned lateral edge web on at least one sidewall or side flank of the metal oxide layer and of the first electrode; and
applying an electrode material for the purpose of forming a second electrode.
According to this method, after the formation of the first electrode with a metal oxide layer disposed above it, at least one resistance element is formed in the form of a self-aligned lateral edge web on a sidewall of the metal oxide layer and of the electrode. The electrode material and the metal oxide-containing layer from which the first electrode and the metal oxide layer are formed may in this case be etched one after the other or in a common etching step.
The object of the invention is furthermore achieved through the use of a method for fabricating a semiconductor component having at least one capacitor, in which a metal oxide layer is situated between a first and a second electrode and in which a resistance element is provided. The method includes the steps of:
applying an electrode material to a substrate surface;
etching the electrode material in given regions and forming the first electrode;
conformally applying a metal oxide-containing layer for the purpose of forming the metal oxide layer;
applying an electrode material for the purpose of forming the second electrode;
etching through the second electrode and the metal oxide layer in given regions thus forming a contact hole reaching down to the first electrode; and
filling this contact hole with a conductive material for the purpose of forming a resistance element.
As a result of this, the resistance element is formed in the form of a contact hole at least in the metal oxide layer. In this case, it is possible to form the contact hole directly in the metal oxide layer and to fill it with a suitable material, or to produce the contact hole only after forming the second electrode in a common etching step in the latter and in the metal oxide layer.
The object of the invention is also achieved by a method for fabricating a semiconductor component having at least one capacitor, in which a metal oxide layer is disposed between a first and a second electrode and in which a resistance element is provided. The method includes following steps:
applying an electrode material to a substrate surface;
selectively etching the electrode material and thus forming the first electrode;
conformally applying a metal oxide-containing layer for the purpose of forming the metal oxide layer;
applying an electrode material for the purpose of forming the second electrode;
removing the metal oxide layer and the second electrode at least in given regions from a top side of the first electrode; and
conformally applying a conductive material having a predetermined material thickness, which forms the resistance element as a result of the contact with the top side of the first electrode and the second electrode.
This method thus serves to form the resistance element in the form of a layer that covers the top side of the first electrode at least in given regions. If the metal oxide layer and the second electrode are removed completely from the top side of the first electrode, the conductive material (resistance element) completely covers the surface and at least some side regions of the first electrode, the metal oxide layer and the second electrode being disposed at the side regions of the first electrode between the conductive material and the first electrode.
It is also possible, however, to produce the resistance element in the form of a self-aligned lateral edge web on the top side of the first electrode, this edge web being formed on the side of the metal oxide layer, which has been removed in given regions from the top side of the first electrode, and of the second electrode.
In accordance with another mode of the invention, the conductive material is anisotropically etched for forming a self-aligned lateral edge web remaining on the top side of the first electrode and on a side surface of the metal oxide layer and of the second electrode, that has been formed with the removing step. The self-aligned lateral edge web then forms the resistance element.
A further method which achieves the above-mentioned object of fabricating a semiconductor component having at least one capacitor, in which a metal oxide layer is situated between a first and a second electrode and in which a resistance element is provided, has the following method steps:
applying a diffusion layer containing at least one diffusion substance to a substrate surface;
applying an electrode material to this layer;
etching the electrode material in given regions thus forming the first electrode and etching the diffusion layer in given regions;
conformally applying a metal oxide-containing layer for the purpose of forming the metal oxide layer;
applying an electrode material for the purpose of forming the second electrode; and
performing a heat treatment in the course of which the diffusion substance diffuses from the diffusion layer at least partly into the metal oxide layer thus forming the resistance element.
In this method, first of all a diffusion layer containing a diffusion substance is applied, wherein this layer makes contact, at least in certain regions, with the metal oxide layer that is to be formed later. As a result of the final heat treatment, the diffusion substance or substances diffuses or diffuse from the diffusion layer into the metal oxide layer and forms or form there, at least in the vicinity of the contact regions between the diffusion layer and the metal oxide layer, at least one region having a higher conductivity than the rest of the metal oxide layer, which is not doped. This region then constitutes the resistance element. It is advantageous in this case that the diffusion takes place only in certain regions and, consequently, the electrical properties sought for the rest of the metal oxide layer, in particular with regard to the remanent electrical polarization, are not influenced.
If the contact region between the diffusion layer and the metal oxide layer is intended to be enlarged in order to assist the diffusion, after the etching of the electrode material for the purpose of forming the first electrode, a conformal sacrificial layer is deposited and is subsequently etched anisotropically and thus an edge web disposed directly laterally next to the first electrode is formed. During the subsequent etching of the diffusion layer, this edge web that has remained at the side regions of the first electrode serves, together with the first electrode, as an etching mask, with the result that the etched diffusion layer consequently protrudes by the width of the conformal sacrificial layer (width of the edge web) from under the first electrode. The edge web is subsequently removed completely. During the subsequent deposition of the metal oxide-containing layer, the protruding regions of the diffusion layer are thus also covered by the metal oxide-containing layer and a larger contact region is formed between the two. The thickness of the sacrificial layer depends on the desired size of this contact region and ultimately on the size of the conductive is region produced by the heat treatment in the metal oxide layer.
The above-mentioned object is furthermore achieved by a method for fabricating a semiconductor component having at least one capacitor, in which a metal oxide layer is situated between a first and a second electrode and in which a resistance element is provided. The method includes the following steps:
applying an electrode material to a substrate surface;
applying a metal oxide-containing layer to the electrode material;
applying a further electrode material to the metal oxide-containing layer;
removing the two electrode materials and the metal oxide-containing layer at least in given regions thus forming a layer stack including the lower electrode, the metal oxide layer and the second electrode; and
implanting ions at least into the metal oxide layer.
In this method, the resistance element is preferably fabricated by lateral implantation into the metal oxide layer. The implantation may be effected from one side or from all sides into the metal oxide layer, wherein with the latter variant the metal oxide layer, that is to say the entire layer stack, is moved as uniformly as possible about an axis of rotation disposed essentially perpendicularly to the layer stack. The substances used for implantation are preferably selected from the group of the diffusion substances specified above.
Other features which are considered as characteristic for the invention are set forth in the appended claims.
Although the invention is illustrated and described herein as embodied in method for fabricating a semiconductor component, it is nevertheless not intended to be limited to the details shown, since various modifications and structural changes may be made therein without departing from the spirit of the invention and within the scope and range of equivalents of the claims.
The construction and method of operation of the invention, however, together with additional objects and advantages thereof will be best understood from the following description of specific embodiments when read in connection with the accompanying drawings.